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SN74LV20APWRE4

Texas Instruments
RoHS
/
Package TSSOP
Category Integrated Circuits (ICs) / Logic - Gates and Inverters
Description NAND e4 Tape & Reel (TR) LV/LV-A/LVX/H logic gate circuit 7ns 5mm 12mA 5.5V
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Technical Details

Physical

Mount Surface Mount
Package / Case TSSOP
Number of Pins 14
Weight 57.209338mg

Dimensions

Length 5mm

Technical

Packaging Tape & Reel (TR)
JESD-609 Code e4
Moisture Sensitivity Level (MSL) 1
Number of Terminations 14
Terminal Finish Nickel/Palladium/Gold (Ni/Pd/Au)
Max Operating Temperature 85°C
Min Operating Temperature -40°C
Subcategory Gates
Packing Method TR
Technology CMOS
Terminal Position DUAL
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 260
Number of Functions 2
Supply Voltage 2.5V
Terminal Pitch 0.65mm
Pin Count 14
Number of Elements 2
Power Supplies 3.3V
Temperature Grade INDUSTRIAL
Max Supply Voltage 5.5V
Min Supply Voltage 2V
Load Capacitance 50pF
Current - Output 12mA
Propagation Delay 7 ns
Quiescent Current 20μA
Family LV/LV-A/LVX/H
Logic Function NAND
Max I(ol) 0.006 A
High Level Output Current -12mA
Low Level Output Current 12mA
Schmitt Trigger NO
Number of Input Lines 4
Number of Output Lines 1

Compliance

Radiation Hardening No
RoHS Status RoHS Compliant
Lead Free Lead Free

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