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SN74LV06ANSRG4

Texas Instruments
RoHS
/
Package SOP
Category Integrated Circuits (ICs) / Logic - Gates and Inverters
Description Buffer Inverter e4 Tape and Reel LV/LV-A/LVX/H logic gate circuit 7.5ns 2mm -2muA 5.5V
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Technical Details

Physical

Mount Surface Mount
Package / Case SOP
Number of Pins 14

Dimensions

Height Seated (Max) 2mm
Width 5.3mm

Technical

Packaging Tape and Reel
JESD-609 Code e4
Moisture Sensitivity Level (MSL) 1
Number of Terminations 14
Terminal Finish Nickel/Palladium/Gold (Ni/Pd/Au)
Max Operating Temperature 125°C
Min Operating Temperature -40°C
Subcategory Gates
Technology CMOS
Terminal Position DUAL
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 260
Number of Functions 6
Supply Voltage 2.5V
Time@Peak Reflow Temperature-Max (s) NOT SPECIFIED
Pin Count 14
Qualification Status Not Qualified
Polarity Inverting
Power Supplies 3.3V
Temperature Grade AUTOMOTIVE
Number of Channels 6
Max Supply Voltage 5.5V
Min Supply Voltage 2V
Propagation Delay 7.5 ns
Quiescent Current 20μA
Turn On Delay Time 18 ns
Family LV/LV-A/LVX/H
Logic Function Buffer, Inverter
Number of Inputs 1
Output Characteristics OPEN-DRAIN
Max I(ol) 0.008 A
High Level Output Current -2μA
Low Level Output Current 16mA
Schmitt Trigger NO

Compliance

RoHS Status RoHS Compliant
Lead Free Lead Free

Alternative Model

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