JESD-609 Code e0
Number of Terminations 44
Terminal Finish Tin/Lead (Sn/Pb)
Additional Feature PAL BLOCKS INTERCONNECTED BY PIA; 2 PAL BLOCKS; 4 EXTERNAL CLOCKS; SHARED INPUT/CLOCK
HTS Code 8542.39.00.01
Subcategory Programmable Logic Devices
Technology CMOS
Terminal Position QUAD
Terminal Form J BEND
Peak Reflow Temperature (Cel) NOT SPECIFIED
Supply Voltage 5V
Terminal Pitch 1.27mm
Time@Peak Reflow Temperature-Max (s) NOT SPECIFIED
Pin Count 44
JESD-30 Code S-PQCC-J44
Qualification Status Not Qualified
Operating Temperature (Max) 70°C
Supply Voltage-Max (Vsup) 5.25V
Power Supplies 5V
Temperature Grade COMMERCIAL
Supply Voltage-Min (Vsup) 4.75V
Number of I/O 32
Clock Frequency 143MHz
Propagation Delay 7.5 ns
Organization 2 DEDICATED INPUTS, 32 I/O
Programmable Logic Type EE PLD
Output Function MACROCELL
Number of Macro Cells 32
JTAG BST NO
Number of Dedicated Inputs 2
In-System Programmable NO