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XQV1000-4BG560N

Xilinx
RoHS
/
Package /
Category Integrated Circuits (ICs) / Embedded - FPGAs (Field Programmable Gate Array)
Description Contains Lead CMOS MILITARY 1999 field programmable gate array 125C 0.8ns 2.375V 1.7mm
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Technical Details

Supply Chain

Factory Lead Time 25 Weeks

Physical

Surface Mount YES

Technical

Packaging Bulk
Published 1999
JESD-609 Code e0
Pbfree Code no
Part Status Discontinued
Moisture Sensitivity Level (MSL) 3
Number of Terminations 560
ECCN Code 3A001.A.2.C
Terminal Finish Tin/Lead (Sn63Pb37)
HTS Code 8542.39.00.01
Subcategory Field Programmable Gate Arrays
Technology CMOS
Terminal Position BOTTOM
Terminal Form BALL
Peak Reflow Temperature (Cel) 225
Supply Voltage 2.5V
Terminal Pitch 1.27mm
Reach Compliance Code not_compliant
Time@Peak Reflow Temperature-Max (s) 30
Pin Count 560
JESD-30 Code S-PBGA-B560
Number of Outputs 404
Qualification Status Not Qualified
Operating Temperature (Max) 125°C
Operating Temperature (Min) -55°C
Supply Voltage-Max (Vsup) 2.625V
Power Supplies 1.2/3.62.5V
Temperature Grade MILITARY
Supply Voltage-Min (Vsup) 2.375V
Number of Inputs 404
Organization 6144 CLBS, 1124022 GATES
Programmable Logic Type FIELD PROGRAMMABLE GATE ARRAY
Number of Gates 1e+06
Screening Level 38535Q/M;38534H;883B
Combinatorial Delay of a CLB-Max 0.8 ns
Number of CLBs 6144
Number of Logic Cells 27648
Number of Equivalent Gates 1124022

Dimensions

Height Seated (Max) 1.7mm
Length 42.5mm
Width 42.5mm

Compliance

RoHS Status Non-RoHS Compliant
Lead Free Contains Lead

Alternative Model

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