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XCV100-5FGG256I

Xilinx
RoHS
/
Package /
Category Integrated Circuits (ICs) / Embedded - FPGAs (Field Programmable Gate Array)
Description CMOS RoHS Compliant BALL Not Qualified field programmable gate array 0.7ns 294MHz 2.375V 2mm
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Technical Details

Physical

Surface Mount YES

Dimensions

Height Seated (Max) 2mm
Length 17mm
Width 17mm

Compliance

RoHS Status RoHS Compliant

Technical

JESD-609 Code e1
Pbfree Code yes
Moisture Sensitivity Level (MSL) 3
Number of Terminations 256
ECCN Code EAR99
Terminal Finish TIN SILVER COPPER
HTS Code 8542.39.00.01
Technology CMOS
Terminal Position BOTTOM
Terminal Form BALL
Peak Reflow Temperature (Cel) 260
Supply Voltage 2.5V
Terminal Pitch 1mm
Time@Peak Reflow Temperature-Max (s) 30
Pin Count 256
JESD-30 Code S-PBGA-B256
Qualification Status Not Qualified
Supply Voltage-Max (Vsup) 2.625V
Supply Voltage-Min (Vsup) 2.375V
Clock Frequency 294MHz
Programmable Logic Type FIELD PROGRAMMABLE GATE ARRAY
Number of Gates 108904
Combinatorial Delay of a CLB-Max 0.7 ns
Number of CLBs 600

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