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EP20K1000EFC672-3X

Altera
RoHS
/
Package /
Category Integrated Circuits (ICs) / Embedded - FPGAs (Field Programmable Gate Array)
Description MACROCELL CMOS OTHER Non-RoHS Compliant field programmable gate array 85C 2.32ns 160MHz 1.71V
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Technical Details

Physical

Surface Mount YES

Technical

JESD-609 Code e1
Moisture Sensitivity Level (MSL) 3
Number of Terminations 672
Terminal Finish TIN SILVER COPPER
HTS Code 8542.39.00.01
Technology CMOS
Terminal Position BOTTOM
Terminal Form BALL
Supply Voltage 1.8V
Terminal Pitch 1mm
Pin Count 672
JESD-30 Code S-PBGA-B672
Qualification Status Not Qualified
Operating Temperature (Max) 85°C
Supply Voltage-Max (Vsup) 1.89V
Temperature Grade OTHER
Supply Voltage-Min (Vsup) 1.71V
Number of I/O 508
Clock Frequency 160MHz
Propagation Delay 2.32 ns
Organization 4 DEDICATED INPUTS, 508 I/O
Programmable Logic Type LOADABLE PLD
Output Function MACROCELL
Number of Dedicated Inputs 4

Dimensions

Height Seated (Max) 3.5mm
Length 27mm
Width 27mm

Compliance

RoHS Status Non-RoHS Compliant

Alternative Model

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