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XCV100E8BG352I

Xilinx
RoHS
/
Package BGA
Category Integrated Circuits (ICs) / Embedded - FPGAs (Field Programmable Gate Array)
Description CMOS Non-RoHS Compliant BALL Not Qualified field programmable gate array 0.4ns 416MHz 1.71V 1.7mm
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Technical Details

Physical

Package / Case BGA
Surface Mount YES

Technical

JESD-609 Code e0
Pbfree Code no
Moisture Sensitivity Level (MSL) 3
Number of Terminations 352
Terminal Finish Tin/Lead (Sn63Pb37)
HTS Code 8542.39.00.01
Subcategory Field Programmable Gate Arrays
Technology CMOS
Terminal Position BOTTOM
Terminal Form BALL
Peak Reflow Temperature (Cel) 225
Supply Voltage 1.8V
Terminal Pitch 1.27mm
Reach Compliance Code not_compliant
Time@Peak Reflow Temperature-Max (s) 30
Pin Count 352
Number of Outputs 196
Qualification Status Not Qualified
Supply Voltage-Max (Vsup) 1.89V
Power Supplies 1.2/3.61.8V
Supply Voltage-Min (Vsup) 1.71V
Clock Frequency 416MHz
Number of Inputs 196
Organization 600 CLBS, 32400 GATES
Programmable Logic Type FIELD PROGRAMMABLE GATE ARRAY
Combinatorial Delay of a CLB-Max 0.4 ns
Number of CLBs 600
Number of Logic Cells 2700
Number of Equivalent Gates 32400

Dimensions

Height Seated (Max) 1.7mm
Length 35mm
Width 35mm

Compliance

RoHS Status Non-RoHS Compliant

Alternative Model

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