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74LV03D,112
Nexperia USA Inc.RoHS
/
Package 14-SOIC (0.154, 3.90mm Width)
Category Integrated Circuits (ICs) / Logic - Gates and Inverters
Description
NAND 74LV03 e4 74LV logic gate circuit 10ns @ 3.3V 50pF 8.65mm 12mA 12mA 5.5V
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Technical Details
Supply Chain
Factory Lead Time 8 Weeks
Physical
Mount Surface Mount
Mounting Type Surface Mount
Package / Case 14-SOIC (0.154, 3.90mm Width)
Number of Pins 14
Technical
Operating Temperature -40°C~125°C
Packaging Tube
Published 2003
Series 74LV
JESD-609 Code e4
Part Status Obsolete
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Number of Terminations 14
Terminal Finish NICKEL PALLADIUM GOLD
Subcategory Gates
Technology CMOS
Voltage - Supply 1V~5.5V
Terminal Position DUAL
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 260
Number of Functions 4
Supply Voltage 3.3V
Time@Peak Reflow Temperature-Max (s) 30
Base Part Number 74LV03
Pin Count 14
Number of Outputs 1
Operating Supply Voltage 3.3V
Supply Voltage-Max (Vsup) 5.5V
Supply Voltage-Min (Vsup) 1V
Number of Circuits 4
Load Capacitance 50pF
Propagation Delay 10 ns
Quiescent Current 40μA
Family LV/LV-A/LVX/H
Logic Function NAND
Number of Inputs 2
Output Characteristics OPEN-DRAIN
Current - Output High, Low 12mA 12mA
Logic Type NAND Gate
Max I(ol) 0.006 A
Max Propagation Delay @ V, Max CL 10ns @ 3.3V, 50pF
Schmitt Trigger NO
Logic Level - Low 0.3V ~ 0.8V
Logic Level - High 0.9V ~ 2V
Dimensions
Length 8.65mm
Width 3.9mm
Compliance
Radiation Hardening No
RoHS Status RoHS Compliant
Alternative Model
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