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74LVC00AMTR
STMicroelectronicsRoHS 
RoHS compliant
RoHS compliantPackage 14-SOIC (0.154, 3.90mm Width)
Category Integrated Circuits (ICs) / Logic - Gates and Inverters
Description
NAND 74LVC00 e4 74LVC logic gate circuit 5.1ns @ 3.3V 50pF 8.65mm 24mA 24mA 3.6V
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Technical Details
Physical
Mount Surface Mount
Mounting Type Surface Mount
Package / Case 14-SOIC (0.154, 3.90mm Width)
Number of Pins 14
Dimensions
Length 8.65mm
Width 3.9mm
Technical
Operating Temperature -55°C~125°C
Packaging Tape & Reel (TR)
Series 74LVC
JESD-609 Code e4
Part Status Obsolete
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Number of Terminations 14
Terminal Finish NICKEL PALLADIUM GOLD
Subcategory Gates
Packing Method TAPE AND REEL
Technology CMOS
Voltage - Supply 1.65V~3.6V
Terminal Position DUAL
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 260
Number of Functions 4
Supply Voltage 2.7V
Time@Peak Reflow Temperature-Max (s) 30
Base Part Number 74LVC00
Pin Count 14
Number of Outputs 1
Supply Voltage-Max (Vsup) 3.6V
Power Supplies 3.3V
Load Capacitance 50pF
Output Current 24mA
Propagation Delay 5.1 ns
Quiescent Current 10μA
Turn On Delay Time 5.1 ns
Family LVC/LCX/Z
Logic Function NAND
Number of Inputs 2
Current - Output High, Low 24mA 24mA
Logic Type NAND Gate
Number of Gates 4
Max Propagation Delay @ V, Max CL 5.1ns @ 3.3V, 50pF
Schmitt Trigger NO
Logic Level - Low 0.7V ~ 0.8V
Logic Level - High 1.7V ~ 2V
Compliance
Radiation Hardening No
RoHS Status ROHS3 Compliant
Lead Free Lead Free
Alternative Model
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