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MC10H113FNR2G

ON Semiconductor
RoHS
/
Package 20-LCC (J-Lead)
Category Integrated Circuits (ICs) / Logic - Gates and Inverters
Description OR XOR 10H113 e3 10H logic gate circuit 1.8ns @ -5.2V - 8.965mm 50mA 50mA -1.13V
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Technical Details

Physical

Mount Surface Mount
Mounting Type Surface Mount
Package / Case 20-LCC (J-Lead)
Number of Pins 20

Technical

Operating Temperature 0°C~75°C
Packaging Tape & Reel (TR)
Published 2006
Series 10H
JESD-609 Code e3
Part Status Obsolete
Moisture Sensitivity Level (MSL) 3 (168 Hours)
Number of Terminations 20
Terminal Finish Tin (Sn)
Subcategory Gates
Packing Method TAPE AND REEL
Technology ECL
Voltage - Supply -4.94V~-5.46V
Terminal Position QUAD
Terminal Form J BEND
Peak Reflow Temperature (Cel) 260
Number of Functions 4
Time@Peak Reflow Temperature-Max (s) 40
Base Part Number 10H113
Pin Count 20
Qualification Status Not Qualified
Number of Circuits 4
Propagation Delay 1.8 ns
Turn On Delay Time 1.8 ns
Family 10H
Logic Function OR, XOR
Number of Inputs 2
Current - Output High, Low 50mA 50mA
Logic Type XOR (Exclusive OR)
Max Propagation Delay @ V, Max CL 1.8ns @ -5.2V, -
Prop. Delay@Nom-Sup 1.9 ns
Schmitt Trigger NO
Logic Level - Low -1.48V
Logic Level - High -1.13V

Dimensions

Length 8.965mm
Width 8.965mm

Compliance

RoHS Status RoHS Compliant
Lead Free Lead Free

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