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74AUP1G02FS3-7

Diodes Incorporated
RoHS
RoHS RoHS compliant
Package 4-XFDFN Exposed Pad
Category Integrated Circuits (ICs) / Logic - Gates and Inverters
Description NOR S-PDSO-N4 74AUP Tape & Reel (TR) logic gate circuit 6.4ns @ 3.3V 30pF 0.35mm 4mA 4mA 3.6V
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Inventory: 5093
Minimum: 1
Total Price: USD $0.34
Unit Price: USD $0.34188
≥1 USD $0.34188
≥10 USD $0.276276
≥100 USD $0.252806
≥500 USD $0.188126
≥1000 USD $0.170497
≥3000 USD $0.141114

Technical Details

Physical

Mount Surface Mount
Mounting Type Surface Mount
Package / Case 4-XFDFN Exposed Pad

Dimensions

Height Seated (Max) 0.35mm
Length 0.8mm
Width 0.8mm

Compliance

RoHS Status ROHS3 Compliant

Technical

Operating Temperature -40°C~125°C TA
Packaging Tape & Reel (TR)
Series 74AUP
Part Status Active
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Number of Terminations 4
Subcategory Gates
Packing Method TAPE AND REEL
Technology CMOS
Voltage - Supply 0.8V~3.6V
Terminal Position DUAL
Terminal Form NO LEAD
Peak Reflow Temperature (Cel) 260
Number of Functions 1
Supply Voltage 3V
Terminal Pitch 0.48mm
Time@Peak Reflow Temperature-Max (s) 30
Pin Count 4
JESD-30 Code S-PDSO-N4
Qualification Status Not Qualified
Supply Voltage-Max (Vsup) 3.6V
Supply Voltage-Min (Vsup) 0.8V
Number of Circuits 1
Load Capacitance 30pF
Output Current 20mA
Propagation Delay 6.4 ns
Quiescent Current 500nA
Turn On Delay Time 34.2 ns
Family AUP/ULP/V
Logic Function NOR
Number of Inputs 2
Current - Output High, Low 4mA 4mA
Logic Type NOR Gate
Max Propagation Delay @ V, Max CL 6.4ns @ 3.3V, 30pF
Schmitt Trigger NO
Logic Level - Low 0.7V ~ 0.9V
Logic Level - High 1.6V ~ 2V

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