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Category Integrated Circuits (ICs) / PMIC - Voltage Regulators - Linear
Description Active FLAT Not Qualified CMOS voltage regulator linear 125C 0.7A 4.5mm 3.672V
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Technical Details

Supply Chain

Factory Lead Time 10 Weeks

Physical

Surface Mount YES

Technical

Packaging Tape & Reel (TR)
JESD-609 Code e3
Part Status Active
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Number of Terminations 5
ECCN Code EAR99
Terminal Finish Tin (Sn)
HTS Code 8542.39.00.01
Subcategory Other Regulators
Packing Method TAPE AND REEL
Technology CMOS
Terminal Position DUAL
Terminal Form FLAT
Peak Reflow Temperature (Cel) 260
Number of Functions 1
Terminal Pitch 1.5mm
Time@Peak Reflow Temperature-Max (s) 10
JESD-30 Code R-PDSO-F5
Number of Outputs 1
Qualification Status Not Qualified
Operating Temperature (Max) 85°C
Operating Temperature (Min) -40°C
Output Voltage 1 3.6V
Input Voltage (Min) 1.5V
Input Voltage (Max) 6V
Dropout Voltage1-Nom 0.05V
Output Voltage1-Max 3.672V
Output Voltage1-Min 3.528V
Regulator Type FIXED POSITIVE SINGLE OUTPUT LDO REGULATOR
Voltage Tolerance-Max 2%
Output Current1-Max 0.7A
Dropout Voltage1-Max 0.075V
Operating Temperature TJ-Max 125°C
Input Voltage Absolute-Max 6.5V
Adjustability FIXED

Dimensions

Height Seated (Max) 1.6mm
Length 4.5mm
Width 2.5mm

Compliance

RoHS Status ROHS3 Compliant
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