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RoHS
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Package 84-LCC (J-Lead)
Category Integrated Circuits (ICs) / Embedded - FPGAs (Field Programmable Gate Array)
Description CMOS 1997 Non-RoHS Compliant J BEND field programmable gate array 0C~70C TA 4.5ns 48MHz 5V
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Technical Details

Physical

Mount Surface Mount
Mounting Type Surface Mount
Package / Case 84-LCC (J-Lead)
Number of Pins 84

Compliance

Radiation Hardening No
RoHS Status Non-RoHS Compliant

Dimensions

Height Seated (Max) 4.572mm
Length 29.3116mm
Width 29.3116mm

Technical

Operating Temperature 0°C~70°C TA
Packaging Tray
Published 1997
Series ACT? 1
JESD-609 Code e0
Part Status Obsolete
Moisture Sensitivity Level (MSL) 3 (168 Hours)
Number of Terminations 84
Terminal Finish Tin/Lead (Sn/Pb)
HTS Code 8542.39.00.01
Subcategory Field Programmable Gate Arrays
Technology CMOS
Voltage - Supply 4.5V~5.5V
Terminal Position QUAD
Terminal Form J BEND
Peak Reflow Temperature (Cel) 225
Supply Voltage 5V
Terminal Pitch 1.27mm
Frequency 48MHz
Time@Peak Reflow Temperature-Max (s) 30
Base Part Number A1020
Pin Count 84
Number of Outputs 69
Operating Supply Voltage 5V
Power Supplies 5V
Number of I/O 69
Propagation Delay 4.5 ns
Turn On Delay Time 4.5 ns
Programmable Logic Type FIELD PROGRAMMABLE GATE ARRAY
Number of Logic Elements/Cells 547
Number of Gates 2000
Number of Registers 273
Number of CLBs 547
Number of Logic Cells 547
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