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ISPLSI 5512VE-100LF388

Lattice Semiconductor Corporation
RoHS
/
Package 388-BBGA
Category Integrated Circuits (ICs) / Embedded - CPLDs (Complex Programmable Logic Devices)
Description YES 388-BBGA 2000 ISPLSI 5512 complex programmable logic device 67MHz 23mm 10ns 2.5/3.33.3V
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Technical Details

Physical

Mounting Type Surface Mount
Package / Case 388-BBGA
Surface Mount YES

Dimensions

Height Seated (Max) 2.6mm
Length 23mm
Width 23mm

Compliance

RoHS Status Non-RoHS Compliant

Technical

Operating Temperature 0°C~70°C TA
Packaging Tray
Published 2000
Series ispLSI? 5000VE
JESD-609 Code e0
Part Status Obsolete
Moisture Sensitivity Level (MSL) 3 (168 Hours)
Number of Terminations 388
ECCN Code EAR99
Terminal Finish Tin/Lead (Sn/Pb)
Additional Feature YES
HTS Code 8542.39.00.01
Subcategory Programmable Logic Devices
Technology CMOS
Terminal Position BOTTOM
Terminal Form BALL
Supply Voltage 3.3V
Terminal Pitch 1mm
Base Part Number ISPLSI 5512
Pin Count 388
JESD-30 Code S-PBGA-B388
Qualification Status Not Qualified
Supply Voltage-Max (Vsup) 3.6V
Power Supplies 2.5/3.33.3V
Supply Voltage-Min (Vsup) 3V
Programmable Type In System Programmable
Number of I/O 256
Clock Frequency 67MHz
Propagation Delay 10 ns
Number of Gates 24000
Output Function MACROCELL
Number of Macro Cells 512
JTAG BST YES
Voltage Supply - Internal 3V~3.6V
Delay Time tpd(1) Max 10ns
Number of Logic Elements/Blocks 16
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