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XCV50-6FG256I

Xilinx
RoHS
/
Package FBGA
Category Integrated Circuits (ICs) / Embedded - FPGAs (Field Programmable Gate Array)
Description CMOS Non-RoHS Compliant BALL Not Qualified field programmable gate array 0.6ns 333MHz 2.375V 2mm
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Technical Details

Physical

Package / Case FBGA
Surface Mount YES

Technical

JESD-609 Code e0
Pbfree Code no
Moisture Sensitivity Level (MSL) 3
Number of Terminations 256
Terminal Finish Tin/Lead (Sn63Pb37)
HTS Code 8542.39.00.01
Subcategory Field Programmable Gate Arrays
Technology CMOS
Terminal Position BOTTOM
Terminal Form BALL
Peak Reflow Temperature (Cel) 225
Supply Voltage 2.5V
Terminal Pitch 1mm
Reach Compliance Code not_compliant
Time@Peak Reflow Temperature-Max (s) 30
Pin Count 256
JESD-30 Code S-PBGA-B256
Number of Outputs 176
Qualification Status Not Qualified
Supply Voltage-Max (Vsup) 2.625V
Power Supplies 1.2/3.62.5V
Supply Voltage-Min (Vsup) 2.375V
Clock Frequency 333MHz
Number of Inputs 176
Organization 384 CLBS, 57906 GATES
Programmable Logic Type FIELD PROGRAMMABLE GATE ARRAY
Combinatorial Delay of a CLB-Max 0.6 ns
Number of CLBs 384
Number of Logic Cells 1728
Number of Equivalent Gates 57906

Dimensions

Height Seated (Max) 2mm
Length 17mm
Width 17mm

Compliance

RoHS Status Non-RoHS Compliant

Alternative Model

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