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SN74AUP1G08DCKTE4

Texas Instruments
RoHS
/
Package SC
Category Integrated Circuits (ICs) / Logic - Gates and Inverters
Description AND e4 Tape & Reel (TR) AUP/ULP/V logic gate circuit 6.2ns 2.494758mg 4mA 3.6V
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Inventory: 253108
Minimum: 1
Total Price: USD $0.07
Unit Price: USD $0.070823
≥1 USD $0.070823
≥10 USD $0.057855
≥100 USD $0.056858
≥500 USD $0.054863
≥1000 USD $0.052868

Technical Details

Physical

Mount Surface Mount
Package / Case SC
Number of Pins 5
Weight 2.494758mg

Compliance

Radiation Hardening No
RoHS Status RoHS Compliant
Lead Free Lead Free

Technical

Packaging Tape & Reel (TR)
JESD-609 Code e4
Moisture Sensitivity Level (MSL) 1
Number of Terminations 5
Terminal Finish Nickel/Palladium/Gold (Ni/Pd/Au)
Max Operating Temperature 85°C
Min Operating Temperature -40°C
Subcategory Gates
Packing Method TR
Technology CMOS
Terminal Position DUAL
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 260
Number of Functions 1
Supply Voltage 1.2V
Pin Count 5
Temperature Grade INDUSTRIAL
Number of Circuits 1
Max Supply Voltage 3.6V
Min Supply Voltage 800mV
Load Capacitance 30pF
Current - Output 4mA
Propagation Delay 6.2 ns
Quiescent Current 500nA
Turn On Delay Time 20.9 ns
Family AUP/ULP/V
Logic Function AND
Output Characteristics 3-STATE
High Level Output Current -4mA
Low Level Output Current 4mA
Schmitt Trigger NO
Number of Input Lines 2

Alternative Model

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