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IDT74LVC16827APAG
Integrated Device Technology (IDT)RoHS
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Package TFSOP
Category Integrated Circuits (ICs) / Logic - Buffers, Drivers, Receivers, Transceivers
Description
RoHS Compliant TRUE DUAL CMOS logic receiver 85C 3.3V 1.1mm 4.7ns
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Technical Details
Technical
JESD-609 Code e3
Pbfree Code yes
Moisture Sensitivity Level (MSL) 1
Number of Terminations 56
ECCN Code EAR99
Terminal Finish Matte Tin (Sn) - annealed
Max Operating Temperature 85°C
Min Operating Temperature -40°C
Technology CMOS
Terminal Position DUAL
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 260
Number of Functions 2
Supply Voltage 3.3V
Terminal Pitch 0.5mm
Time@Peak Reflow Temperature-Max (s) 30
Pin Count 56
JESD-30 Code R-PDSO-G56
Qualification Status Not Qualified
Number of Elements 2
Supply Voltage-Max (Vsup) 3.6V
Temperature Grade INDUSTRIAL
Number of Ports 2
Family LVC/LCX/Z
Logic Function Buffer, Inverting
Output Characteristics 3-STATE
Output Polarity TRUE
Logic IC Type BUS DRIVER
Number of Bits per Element 10
High Level Output Current 24mA
Propagation Delay (tpd) 4.7 ns
Low Level Output Current 24mA
Dimensions
Height Seated (Max) 1.1mm
Length 14mm
Width 6.1mm
Compliance
RoHS Status RoHS Compliant
Alternative Model
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