- English
Account & Orders
Sign In
New Account? Start here
IDT49FCT805PYGI
Integrated Device Technology (IDT)RoHS
/
Package SSOP
Category Integrated Circuits (ICs) / Clock/Timing - Clock Buffers, Drivers
Description
LVTTL SSOP Matte Tin (Sn) - annealed Clock clock buffer 5.3mm 0.064A 0.7ns 80MHz
PDF
/
Favorite
Payment Methods:
Delivery Services:
Pricing & Ordering
Inventory: 9071
Minimum:
Technical Details
Physical
Mount Surface Mount
Package / Case SSOP
Number of Pins 20
Dimensions
Height 1.73mm
Length 7.2mm
Width 5.3mm
Compliance
RoHS Status RoHS Compliant
Technical
Published 2009
JESD-609 Code e3
Pbfree Code yes
Moisture Sensitivity Level (MSL) 1
Number of Terminations 20
ECCN Code EAR99
Terminal Finish Matte Tin (Sn) - annealed
Max Operating Temperature 85°C
Min Operating Temperature -40°C
Technology CMOS
Terminal Position DUAL
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 260
Number of Functions 2
Supply Voltage 5V
Terminal Pitch 0.65mm
Time@Peak Reflow Temperature-Max (s) 30
Pin Count 20
Qualification Status Not Qualified
Power Supplies 5V
Temperature Grade INDUSTRIAL
Number of Circuits 2
Max Supply Voltage 5.25V
Min Supply Voltage 4.75V
Frequency (Max) 80MHz
Family FCT
Logic Function Clock
Output Characteristics 3-STATE
Input LVTTL
Max I(ol) 0.064 A
Prop. Delay@Nom-Sup 5.6 ns
Propagation Delay (tpd) 5.6 ns
Same Edge Skew-Max (tskwd) 0.7 ns
Number of True Outputs 5
Alternative Model
Recommended For You
IDT49FCT805PYGI price comparison, buy IDT49FCT805PYGI online, IDT49FCT805PYGI datasheet pdf download, find IDT49FCT805PYGI in stock, where to buy IDT49FCT805PYGI, IDT49FCT805PYGI price and availability, buy IDT49FCT805PYGI with fast shipping, order IDT49FCT805PYGI online, IDT49FCT805PYGI supplier near me, IDT49FCT805PYGI product tutorial, how to use IDT49FCT805PYGI, IDT49FCT805PYGI download software/manual