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EP320IPC-40

Altera
RoHS
/
Package /
Category Integrated Circuits (ICs) / Embedded - FPGAs (Field Programmable Gate Array)
Description MACROCELL CMOS COMMERCIAL Non-RoHS Compliant field programmable gate array 70C 40ns 21.7MHz 5V
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Technical Details

Physical

Surface Mount NO

Technical

JESD-609 Code e0
Pbfree Code no
Number of Terminations 20
ECCN Code EAR99
Terminal Finish Tin/Lead (Sn/Pb)
HTS Code 8542.39.00.01
Subcategory Programmable Logic Devices
Technology CMOS
Terminal Position DUAL
Terminal Form THROUGH-HOLE
Peak Reflow Temperature (Cel) NOT SPECIFIED
Supply Voltage 5V
Terminal Pitch 2.54mm
Time@Peak Reflow Temperature-Max (s) NOT SPECIFIED
JESD-30 Code R-PDIP-T20
Number of Outputs 8
Qualification Status Not Qualified
Operating Temperature (Max) 70°C
Power Supplies 5V
Temperature Grade COMMERCIAL
Clock Frequency 21.7MHz
Propagation Delay 40 ns
Architecture PAL-TYPE
Number of Inputs 18
Programmable Logic Type EE PLD
Output Function MACROCELL
Number of Product Terms 72

Compliance

RoHS Status Non-RoHS Compliant

Alternative Model

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