JESD-609 Code e0
Number of Terminations 100
ECCN Code 3A001.A.2.C
Terminal Finish Tin/Lead (Sn/Pb)
Additional Feature LABS INTERCONNECTED BY PIA; 8 LABS; 128 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK
HTS Code 8542.39.00.01
Subcategory Programmable Logic Devices
Technology CMOS
Terminal Position PERPENDICULAR
Terminal Form PIN/PEG
Supply Voltage 5V
Terminal Pitch 2.54mm
Pin Count 100
JESD-30 Code S-CPGA-P100
Qualification Status Not Qualified
Operating Temperature (Max) 125°C
Operating Temperature (Min) -55°C
Supply Voltage-Max (Vsup) 5.5V
Power Supplies 5V
Temperature Grade MILITARY
Supply Voltage-Min (Vsup) 4.5V
Number of I/O 64
Clock Frequency 40MHz
Propagation Delay 45 ns
Organization 19 DEDICATED INPUTS, 64 I/O
Programmable Logic Type UV PLD
Screening Level 38535Q/M;38534H;883B
Output Function MACROCELL
Number of Macro Cells 128
JTAG BST NO
Number of Dedicated Inputs 19
In-System Programmable NO