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ICS650GI-41LF

Integrated Device Technology (IDT)
RoHS
/
Package TSSOP
Category Integrated Circuits (ICs) / Clock/Timing - Clock Generators, PLLs, Frequency Synthesizers
Description Clock TSSOP e3 Matte Tin (Sn) - annealed clock generator circuit 3.465V 50MHz 5mm -40C
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Technical Details

Physical

Mount Surface Mount
Package / Case TSSOP

Technical

Published 1999
JESD-609 Code e3
Pbfree Code yes
Moisture Sensitivity Level (MSL) 1
Number of Terminations 16
ECCN Code EAR99
Terminal Finish Matte Tin (Sn) - annealed
Max Operating Temperature 85°C
Min Operating Temperature -40°C
Technology CMOS
Terminal Position DUAL
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 260
Supply Voltage 3.3V
Terminal Pitch 0.65mm
Time@Peak Reflow Temperature-Max (s) 30
Pin Count 16
Qualification Status Not Qualified
Supply Voltage-Max (Vsup) 3.465V
Power Supplies 2.53.3V
Temperature Grade OTHER
Number of Circuits 1
Frequency (Max) 50MHz
Input Clock
Primary Clock/Crystal Frequency-Nom 25MHz
PLL Yes

Dimensions

Length 5mm
Width 4.4mm

Compliance

RoHS Status RoHS Compliant

Alternative Model

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