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XC2S400E-6FT256I

Xilinx
RoHS
/
Package /
Category Integrated Circuits (ICs) / Embedded - FPGAs (Field Programmable Gate Array)
Description CMOS RoHS Compliant BALL BOTTOM field programmable gate array 100C 20kB 0.47ns 357MHz
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Technical Details

Physical

Mount Standard
Number of Pins 256

Dimensions

Height Seated (Max) 2mm
Length 17mm
Width 17mm

Compliance

Radiation Hardening No
RoHS Status RoHS Compliant

Technical

JESD-609 Code e0
Pbfree Code no
Moisture Sensitivity Level (MSL) 3
Number of Terminations 256
ECCN Code EAR99
Max Operating Temperature 100°C
Min Operating Temperature -40°C
Additional Feature MAXIMUM USABLE GATES = 150000
HTS Code 8542.39.00.01
Subcategory Field Programmable Gate Arrays
Technology CMOS
Terminal Position BOTTOM
Terminal Form BALL
Peak Reflow Temperature (Cel) 240
Supply Voltage 1.8V
Terminal Pitch 1mm
Time@Peak Reflow Temperature-Max (s) 30
Pin Count 256
Number of Outputs 410
Operating Supply Voltage 1.8V
Supply Voltage-Max (Vsup) 1.89V
RAM Size 20kB
Clock Frequency 357MHz
Programmable Logic Type FIELD PROGRAMMABLE GATE ARRAY
Speed Grade 6
Combinatorial Delay of a CLB-Max 0.47 ns
Number of CLBs 864
Number of Logic Cells 10800
Number of Equivalent Gates 52000

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