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Package QSOP
Category Integrated Circuits (ICs) / Clock/Timing - Clock Buffers, Drivers
Description LVTTL QSOP Matte Tin (Sn) - annealed Clock clock buffer 3.8mm 0.024A 0.6ns 100MHz
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Technical Details

Physical

Mount Surface Mount
Package / Case QSOP
Number of Pins 20

Technical

Published 2009
JESD-609 Code e3
Pbfree Code yes
Moisture Sensitivity Level (MSL) 1
Number of Terminations 20
ECCN Code EAR99
Terminal Finish Matte Tin (Sn) - annealed
Max Operating Temperature 85°C
Min Operating Temperature -40°C
Technology CMOS
Terminal Position DUAL
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 260
Number of Functions 1
Supply Voltage 3.3V
Terminal Pitch 0.635mm
Time@Peak Reflow Temperature-Max (s) 30
Pin Count 20
Qualification Status Not Qualified
Temperature Grade INDUSTRIAL
Number of Circuits 1
Max Supply Voltage 3.6V
Min Supply Voltage 3V
Frequency (Max) 100MHz
Family FCT
Logic Function Clock
Output Characteristics 3-STATE
Input LVTTL
Max I(ol) 0.024 A
Prop. Delay@Nom-Sup 4.8 ns
Propagation Delay (tpd) 4.8 ns
Same Edge Skew-Max (tskwd) 0.6 ns
Number of True Outputs 10

Dimensions

Height 1.47mm
Length 8.7mm
Width 3.8mm

Compliance

RoHS Status RoHS Compliant
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