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EP20K400FC672-2V

Altera
RoHS
/
Package /
Category Integrated Circuits (ICs) / Embedded - FPGAs (Field Programmable Gate Array)
Description MACROCELL CMOS OTHER RoHS Compliant field programmable gate array 85C 3.1ns 34MHz 2.375V
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Technical Details

Physical

Surface Mount YES

Technical

JESD-609 Code e1
Moisture Sensitivity Level (MSL) 3
Number of Terminations 672
ECCN Code 3A001.A.7.A
Terminal Finish TIN SILVER COPPER
HTS Code 8542.39.00.01
Subcategory Field Programmable Gate Arrays
Technology CMOS
Terminal Position BOTTOM
Terminal Form BALL
Supply Voltage 2.5V
Terminal Pitch 1mm
Pin Count 672
JESD-30 Code S-PBGA-B672
Number of Outputs 496
Qualification Status Not Qualified
Operating Temperature (Max) 85°C
Supply Voltage-Max (Vsup) 2.625V
Power Supplies 2.52.5/3.3V
Temperature Grade OTHER
Supply Voltage-Min (Vsup) 2.375V
Number of I/O 502
Clock Frequency 34MHz
Propagation Delay 3.1 ns
Number of Inputs 496
Organization 4 DEDICATED INPUTS, 502 I/O
Programmable Logic Type LOADABLE PLD
Number of Gates 400000
Number of Logic Blocks (LABs) 16640
Output Function MACROCELL
Number of Dedicated Inputs 4

Dimensions

Height Seated (Max) 3.5mm
Length 27mm
Width 27mm

Compliance

RoHS Status RoHS Compliant
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